The question we try to answer is whether it is safe to bypass VB_SYS with a large capacitor, or whether this will cause too high a load on USB.
The USB voltage the PC provides was measured with a plug that can switch a 10 Ohm resistor between VBUS and GND.
The resistance between the VBUS and GND contacts of a USB receptacle connected to this USB probe with the switch closed was measured to be 9.9 Ohm. When connecting the USB probe to the PC, the PC outputs 5003mV when the switch is open, and 4897mV when it is closed.
We also need to consider the PC's response to a sudden load change. The image below shows that VBUS drops when the 10 Ohm load is applied:
However, this drop is negligibly brief, only about 10ns, which is orders of magnitude below the effects we're examining here.
The next element of the path to the GTA02 is the USB cable. The voltage drop in the cable was measured by attaching receptacles to both ends and sending a current of 500mA through the cable. 85mV were dropped on VBUS and 40mV were dropped on GND and the shield combined. The cable has thus a round-trip resistance of about 250mOhm.
The cable capacitance was measured to be about 200pF, which is negligible in this context.
There are capacitors between the connector and the USB current limiter, and there are capacitors on the VB_SYS rail which in turn supplies the regulators. USB current limiter and regulators are part of the PMU.
The device used in these experiments is a GTA0v5 with a ceramic capacitor of 10uF on VB_SYS. (This capacitor did not exist in the original GTA02v5 design but was later added as C1767.)
The total capacitance on USB_VBUS is 45.2uF, consisting of C4902 (100nF), C4906 (22uF), and C4909 (1uF) directly on USB_VBUS, and C4911 (100nF) and C4913 (22uF) behind U4905, which switches inbound USB power on or off.
Note that an input capacitance of 45.2uF exceeds the 10uF limit specified in section 18.104.22.168 "Inrush Current Limiting" of the Universal Serial Bus Specification, Revision 2.0.
VB_SYS is shown in yellow, USB_VBUS in blue. The image on the right zooms into the rise of VB_SYS, i.e., when the 10uF capacitor is charged.
We see that USB_VBUS drops by about 128mV during 40us. A drop of 128mV across the 250mOhm we have measured before for the cable would correspond to 512mA. However, since the PC's USB power also drops under such a load, the actual current must be less. It was not possible to measure the USB voltage at the PC in this experiment, but we can obtain a lower bound by assuming the full drop to 4900mV. We would thus drop 60mV over the 250mOhm path, corresponding to 240mA.
Drawing a current between 240mA and 512mA without permission from the upstream device violates the USB specification, but since this behaviour is the hard-wired configuration of our PMU, there is little we can do about this.
Note that the rise time of VB_SYS has increased from about 40us to almost 50ms. Also note that the brief VBUS spike just before VB_SYS begins to raise does not always occur. This might be due to some latency in the PMU's USB current path.
When calculating the current, we obtain a lower bound of 360mA (90mV) and an upper bound of 688mA (172mV). This is consistent with the PMU limiting the current to a value below 500mA.
There is also a period of about 4ms at the beginning of the VB_SYS rise, during which the voltage drops by up to an additional 60mV, corresponding to 240mA. It is not clear what is causing this. Note that this could also be caused by exceeding the 500mA current budget by a smaller amount, and the host lowering VBUS in response.
With 110-115uF, VB_SYS rises within 900-1000us. The voltage drop seems a bit more pronounced since we just cover the 4ms high-current excursion described above.
Electrolytic (left) and tantalum (right) show similar performance, with the tantalum capacitor drawing about 100mA less and therefore taking a bit longer to charge.
However, we violate the USB 2.0 specification as follows:
Fri Jul 11 09:23:30 UTC 2008